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21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT16373/162373/162H373T PI74FCT16373T 16-BIT TRANSPARENT LATCHES
PI74FCT162373T PI74FCT162H373T
Fast CMOS 16-Bit Transparent Latches
Product Features:
Common Features: * PI74FCT16373T, PI74FCT162373T, and PI74FCT162H373T are high-speed, low power devices with high current drive. * Vcc = 5V 10% * Hysteresis on all inputs * Packages available: - 48-pin 240 mil wide plastic TSSOP (A) - 48-pin 300 mil wide plastic SSOP (V) PI74FCT16373T Features: * High output drive: IOH = -32 mA; IOL = 64 mA * Power off disable outputs permit "live insertion" * Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V, TA = 25C PI74FCT162373T Features: * Balanced output drivers: 24 mA * Reduced system switching noise * Typical VOLP (Output Ground Bounce) < 0.6V at VCC = 5V, TA = 25C PI74FCT162H373T Features: * Bus Hold retains last active bus state during 3-state * Eliminates the need for external pull-up resistors
Product Description:
Pericom Semiconductor's PI74FCT series of logic circuits are produced in the Company's advanced 0.6 micron CMOS technology, achieving industry leading speed grades. The PI74FCT16373T, PI74FCT162373T, and PI74FCT162H373T are 16-bit transparent latches designed with 3-state outputs and are intended for bus oriented applications. The Output Enable and Latch Enable controls are organized to operate as two 8-bit latches or one 16-bit latch. When Latch Enable (LE) is HIGH, the flip-flops appear transparent to the data. The data that meets the set-up time when LE is LOW is latched. When OE is HIGH, the bus output is in the high impedance state. The PI74FCT16373T output buffers are designed with a PowerOff disable allowing "live insertion" of boards when used as backplane drivers. The PI74FCT162373T has 24 mA balanced output drivers. It is designed with current limiting resistors at its outputs to control the output edge rate resulting in lower ground bounce and undershoot. This eliminates the need for external terminating resistors for most interface applications. The PI74FCT162H373T has "Bus Hold" which retains the input's last state whenever the input goes to high-impedance preventing "floating" inputs and eliminating the need for pull-up/down resistors.
Logic Block Diagram
1OE
2OE
1LE
2LE
1D0
D
1O0
2D0
D
2O0
C
C
TO 7 OTHER CHANNELS
TO 7 OTHER CHANNELS
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Product Pin Description
Pin Name xOE xLE xDx xOx GND VCC Note: Description Output Enable Inputs (Active LOW) Latch Enable Inputs (Active HIGH) Inputs(1) 3-State Outputs Ground Power
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PI74FCT16373/162373/162H373T 16-BIT TRANSPARENT LATCHES
Truth Table
Inputs(1)
XDX XOE
H L X Note:
L L H
xLE H H X
Outputs(1) xOx H L Z
1. H = High Voltage Level, X = Don't Care, L = Low Voltage Level, Z = High Impedance
1. For the PI74FCT162H373T, these pins have "Bus Hold." All other pins are standard, outputs, or I/Os.
Product Pin Configuration
1OE 1O0 1O1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41 40
1LE 1D0 1D1
GND
1O2 1O3
GND
1D2 1D3
VCC
1O4 1O5
VCC
1D4 1D5
GND
1O6 1O7 2O0 2O1
48-PIN V48 A48
39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
GND
1D6 1D7 2D0 2D1
GND
2O2 2O3
GND
2D2 2D3
VCC
2O4 2O5 GND 2O6 2O7 2OE
VCC
2D4 2D5 GND 2D6 2D7 2LE
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PI74FCT16373/162373/162H373T 16-BIT TRANSPARENT LATCHES
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature .................................................................... -65C to +150C Ambient Temperature with Power Applied .................................... -40C to +85C Supply Voltage to Ground Potential (Inputs & Vcc Only) .............. -0.5V to +7.0V Supply Voltage to Ground Potential (Outputs & D/O Only) ........... -0.5V to +7.0V DC Input Voltage ............................................................................ -0.5V to +7.0V DC Output Current ..................................................................................... 120 mA Power Dissipation ..........................................................................................1.0W Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
DC Electrical Characteristics (Over the Operating Range, TA = -40C to +85C, VCC = 5.0V 10%)
Parameters Description VIH VIL IIH IIH IIH IIH IIL IIL IIL IIL IBHH IBHL IOZH(5) IOZL(5) VIK IOS IO VH Input HIGH Voltage Input LOW Voltage Input HIGH Current Input HIGH Current Input HIGH Current Input HIGH Current Input LOW Current Input LOW Current Input LOW Current Input LOW Current Bus Hold Sustain Current High Impedance Output Current Clamp Diode Voltage Short Circuit Current Output Drive Current Input Hysteresis Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level Standard Input , VCC = Max. Standard I/O, VCC = Max. Bus Hold Input(4), VCC = Max. Bus Hold I/O(4), VCC = Max. Standard Input , VCC = Min. Standard I/O, VCC = Min. Bus Hold Input(4), VCC = Min. Bus Hold I/O(4), VCC = Min. Bus Hold Input(4), VCC = Min. VCC = Max. VCC = Max. VCC = Min., IIN = -18 mA VCC = Max.(3), VOUT = GND VCC = Max.(3), VOUT = 2.5V Min. 2.0 VIN = VCC VIN = VCC VIN = VCC VIN = VCC VIN = GND VIN = GND VIN = GND VIN = GND VIN = 2.0V VIN = 0.8V VOUT = 2.7V VOUT = 0.5V 0.8 1 1 100 100 -1 -1 100 100 -50 +50 1 -1 -1.2 -200 -180 Typ(2) Max. Units V V A A A A A A A A A A A V mA mA m V
-80 -50
-0.7 -140 100
Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 5.0V, +25C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. Pins with Bus Hold are identified in the pin description. 5. This specification does not apply to bi-directional functionalities with Bus Hold.
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PI74FCT16373/162373/162H373T 16-BIT TRANSPARENT LATCHES
PI74FCT16373T Output Drive Characteristics (Over the Operating Range)
Parameters Description VOH Output HIGH Voltage Test Conditions(1) VCC = Min., VIN = VIH or VIL IOH = -3.0 mA IOH = -15.0 mA IOH = -32.0 mA IOL = 64 mA Min. 2.5 2.4 2.0 -- Typ(2) 3.5 3.5 3.0 0.2 -- Max. Units V
VOL IOFF
Output LOW Voltage Power Down Disable
VCC = Min., VIN = VIH or VIL VCC = 0V, VIN or VOUT 4.5V
0.55 100
V A
PI74FCT162373T/162H373T Output Drive Characteristics (Over the Operating Range)
Parameters Description VOH VOL IODL IODH Output HIGH Voltage Output LOW Voltage Output LOW Current Output HIGH Current Test Conditions(1) VCC = Min., VIN = VIH or VIL IOH = -24.0 mA VCC = Min., VIN = VIH or VIL IOL = 24 mA VCC = 5V, VIN = VIH OR VIL, VOUT = 1.5V(3) VCC = 5V, VIN = VIH OR VIL, VOUT = 1.5V(3) Min. 2.4 60 -60 Typ(2) 3.3 0.3 115 -115 Max. 0.55 150 -150 Units V V mA mA
Capacitance (TA = 25C, f = 1 MHz)
Parameters(4) CIN COUT Description Input Capacitance Output Capacitance Test Conditions VIN = 0V VOUT = 0V Typ 4.5 5.5 Max. 6 8 Units pF pF
Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 5.0V, +25C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. This parameter is determined by device characterization but is not production tested.
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PI74FCT16373/162373/162H373T 16-BIT TRANSPARENT LATCHES
Power Supply Characteristics
Parameters Description ICC ICC ICCD Quiescent Power Supply Current Supply Current per Input @ TTL HIGH Supply Current per Input per MHz(4) Test Conditions(1) VCC = Max. VCC = Max. VCC = Max., Outputs Open XOE = GND, XLE = VCC One Bit Toggling 50% Duty Cycle VCC = Max., Outputs Open fI = 10 MHZ 50% Duty Cycle XOE = GND, XLE = VCC One Bit Toggling VCC = Max., Outputs Open fI = 2.5 MHZ 50% Duty Cycle XOE = GND, XLE = VCC 16 Bits Toggling VIN = GND or VCC VIN = 3.4V(3) VIN = VCC VIN = GND Min. Typ(2) 0.1 0.5 60 Max. 500 1.5 100 Units A mA A/ MHz
IC
Total Power Supply Current(6)
VIN = VCC VIN = GND
0.6
1.5(5)
mA
VIN = 3.4V VIN = GND VIN = VCC VIN = GND
0.9 2.4
2.3(5) 4.5(5)
VIN = 3.4V VIN = GND
6.4
16.5(5)
Notes: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device. 2. Typical values are at Vcc = 5.0V, +25C ambient. 3. Per TTL driven input (VIN = 3.4V); all other inputs at Vcc or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested. 6. IC =IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCP/2 + fINI) ICC = Quiescent Current ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fI = Input Frequency NI = Number of Inputs at fI All currents are in milliamps and all frequencies are in megahertz.
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PS2033A 03/11/96
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PI74FCT16373/162373/162H373T 16-BIT TRANSPARENT LATCHES
PI74FCT16373T Switching Characteristics over Operating Range
16373T Com. 16373AT Com. Min Max 16373CT Com. Min Max 16373DT Com. Min Max 16373ET Com. Min Max Unit
Parameters tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tSU tH tW tSK(o)
Description Propagation Delay xDx to xOx Propagation Delay xLE to xOx Output Enable Time xOE to xOx Output Disable Time(3) xOE to xOx Setup Time HIGH or LOW, XDX to XLE Hold Time HIGH or LOW, XDX to XLE xLE Pulse Width HIGH(3) Output Skew(4)
Conditions(1) CL = 50 pF RL = 500
Min
Max
1.5 2.0 1.5 1.5 2.0 1.5 6.0 --
8.0 13.0 12.0 7.5 -- -- -- 0.5
1.5 2.0 1.5 1.5 2.0 1.5 5.0 --
5.2 8.5 6.5 5.5 -- -- -- 0.5
1.5 2.0 1.5 1.5 2.0 1.5 5.0 --
4.2 5.5 5.5 5.0 -- -- -- 0.5
1.5 1.5 1.5 1.5 1.5 1.0 3.0 --
3.8 4.0 4.8 4.0 -- -- -- 0.5
1.5 1.5 1.5 1.5 1.0 1.0 3.0 --
3.4 3.7 4.4 4.0 -- -- -- 0.5
ns ns ns ns ns ns ns ns
PI74FCT162373T Switching Characteristics over Operating Range
162373T Com.
(1)
162373AT Com. Min Max
162373CT Com. Min Max
162373DT Com. Min Max
162373ET Com. Min Max Unit
Parameters tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tSU tH tW tSK(o)
Description Propagation Delay xDx to xOx Propagation Delay xLE to xOx Output Enable Time xOE to xOx Output Disable Time(3) xOE to xOx Setup Time HIGH or LOW, XDX to XLE Hold Time HIGH or LOW, XDX to XLE xLE Pulse Width HIGH(3) Output Skew(4)
Conditions CL = 50 pF RL = 500
Min
Max
1.5 2.0 1.5 1.5 2.0 1.5 6.0 --
8.0 13.0 12.0 7.5 -- -- -- 0.5
1.5 2.0 1.5 1.5 2.0 1.5 5.0 --
5.2 8.5 6.5 5.5 -- -- -- 0.5
1.5 2.0 1.5 1.5 2.0 1.5 5.0 --
4.2 5.5 5.5 5.0 -- -- -- 0.5
1.5 1.5 1.5 1.5 1.5 1.0 3.0 --
3.8 4.0 4.8 4.0 -- -- -- 0.5
1.5 1.5 1.5 1.5 1.0 1.0 3.0 --
3.4 3.7 4.4 4.0 -- -- -- 0.5
ns ns ns ns ns ns ns ns
Notes: 1. See test circuit and wave forms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. This parameter is guaranteed but not production tested. 4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
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PS2033A 03/11/96
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PI74FCT16373/162373/162H373T 16-BIT TRANSPARENT LATCHES
PI74FCT162H373T Switching Characteristics over Operating Range
162H373T Com. 162H373AT 162H373CT 162H373DT 162H373ET Com. Min Max Com. Min Max Com. Min Max Com. Min Max Unit
Parameters tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tSU tH tW tSK(o)
Description Propagation Delay xDx to xOx Propagation Delay xLE to xOx Output Enable Time xOE to xOx Output Disable Time(3) xOE to xOx Setup Time HIGH or LOW, XDX to XLE Hold Time HIGH or LOW, XDX to XLE xLE Pulse Width HIGH(3) Output Skew(4)
Conditions(1) CL = 50 pF RL = 500
Min
Max
1.5 2.0 1.5 1.5 2.0 1.5 6.0 --
8.0 13.0 12.0 7.5 -- -- -- 0.5
1.5 2.0 1.5 1.5 2.0 1.5 5.0 --
5.2 8.5 6.5 5.5 -- -- -- 0.5
1.5 2.0 1.5 1.5 2.0 1.5 5.0 --
4.2 5.5 5.5 5.0 -- -- -- 0.5
1.5 1.5 1.5 1.5 1.5 1.0 3.0 --
3.8 4.0 4.8 4.0 -- -- -- 0.5
1.5 1.5 1.5 1.5 1.0 1.0 3.0 --
3.4 3.7 4.4 4.0 -- -- -- 0.5
ns ns ns ns ns ns ns ns
Notes: 1. See test circuit and wave forms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. This parameter is guaranteed but not production tested. 4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
Pericom Semiconductor Corporation 2380 Bering Drive * San Jose, CA 95131 * 1-800-435-2336 * Fax (408) 435-1100 * http://www.pericom.com
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PS2033A 03/11/96

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